Manufacturing of semiconductor devices typically involves performing a sequence of procedures with respect to a substrate such as a silicon substrate, a glass plate, etc. These steps may include polishing, deposition, etching, photolithography, heat treatment, and so forth. Usually a number of different processing steps may be performed in a single processing system or “tool” which includes a plurality of processing chambers. However, it is generally the case that other processes are required to be performed at other processing locations within a fabrication facility, and it is accordingly necessary that substrates be transported within the fabrication facility from one processing location to another. Depending on the type of semiconductor device to be manufactured, there may be a relatively large number of processing steps required, to be performed at many different processing locations within the fabrication facility.
It is conventional to transport substrates from one processing location to another within substrate carriers such as sealed pods, cassettes, containers and so forth. It is also conventional to employ automated substrate carrier transport devices, such as automatic guided vehicles, overhead transport systems, substrate carrier handling robots, etc., to move substrate carriers from location to location within the fabrication facility or to transfer substrate carriers from or to a substrate carrier transport device.
For an individual substrate, the total fabrication process, from formation or receipt of the virgin substrate to cutting of semiconductor devices from the finished substrate, may require an elapsed time that is measured in weeks or months. In a typical fabrication facility, a large number of substrates may accordingly be present at any given time as “work in progress” (WIP). The substrates present in the fabrication facility as WIP may represent a very large investment of working capital, which tends to increase the per substrate manufacturing cost.
When a fabrication facility is fully operational, reducing WIP decreases capital and manufacturing costs. WIP reduction may be achieved, for example, by reducing the average total elapsed time for processing each substrate within the fabrication facility.
Previously incorporated U.S. patent application Ser. No. 10/650,310, filed Aug. 28, 2003, titled “System for Transporting Semiconductor Substrate Carriers”, discloses a substrate carrier transport system that includes a conveyor for substrate carriers that is intended to be constantly in motion during operation of the fabrication facility which it serves. The constantly moving conveyor is intended to facilitate transportation of substrates within the fabrication facility so as to reduce the total “dwell” or “cycle” time of each substrate in the fabrication facility. WIP reduction thereby may be achieved as less WIP is needed to produce the same factory output.